Physical AI will drive explosive growth in the number if distinct chips with some 3,000 chips in a physical AI device like cars and humanoid robots. This will drive the need for more efficient design and autonomy. CHIPAGENTS
Using AI to speed chip design has become a hot topic of late! AI models can be used to do for chips what Anthropic has done for software: speed up the work so you can do more work. After providing some perspective on three startups, I recently covered what Cognichip and Cadence design has announced, and now another company has announced new chip-design AI, targeting both digital and analog chips: ChipAgents.
ChipAgents Is Targeting the Vast Physical AI Chip Design Market
While data center growth is currently consuming everyone’s attention, Physical AI is touted as the next big thing in AI, bringing robotic intelligence and automated vehicles to market. Unfortunately, this vision has a rather large problem: the current industry cannot possibly provide the number of chip designs needed to populate the vast array of physical devices envisioned. ChipAgents, a startup I covered in my overview of three startups driving Agentic AI solutions to accelerate chip development, has estimated that each physical AI device could consist of upwards of 3000 chips. Sounds high to me, but when you do the math at a projected 145 million devices, that implies some half trillion chips could be required from the semiconductor industry, an impossibility given then current capacity for chip design and production. Even if the 3000 number is too high, the industry will undoubtedly need a lot of chips; a good market to target for automation.
As chips become more complex, few designs work on the first tapeout and costs accelerate towards $1B. CHIPAGENTS
Chip Complexity Demands a 10X Design Improvement
I always thought new chip designs were increasingly being produced with “A0” silicon, but the data provided by ChipAgents show that engineering excellence is being overwhelmed by increasing design complexity, with only some 10% of designs working on the first tapeout. Even OpenAI’s famous Jalepeño AI chips is being spun into a B0 for production. And with the cost of a tapeout increasing exponentially, the situation has become untenable.
ChipAgents IC-Star neural engine will apply across the design flow. CHIPAGENTS
lving this problem demands co-optimization across the design flow, from architecture to RTL to verification, etc. That full stack of automation is what ChipAgents is targeting, using AI models that were not derived by fine-tuning language models (LLMs), but by training the AI using chip design physics and design experiences. Sounds similar to what Cadence announced this week with Maestro.
Can ChipAgents IC-star Deliver 10X Design Throughput?
ChipAgents is expanding its agentic AI platform across digital and analog chip design, bringing traditionally fragmented workflows onto a common AI-native foundation. ChipAgents announced an agentic AI framework built around a new physics-aware models that can be applied across digital and analog chip design flows. These models are based on the IC-start chip neural execution engine.
The platform is powered by IC-star and orchestration, dynamic model routing, and most importantly physics-aware models. The company envisions this solution will be applied for both digital an analog chip designs.
Rarely the case with a startup, ChipAgents’ full-stack approach builds on more than 200 semiconductor enterprise deployments. IC-star brings together four tightly integrated capabilities:
- IC Design Ontology: A persistent context layer for engineers and agents that unifies design knowledge, plans, reusable skills and customer-specific methodologies, continuously improving the system through engineering feedback.
- Reasoning Core: Plans and coordinates agents, models and engineering tools around an objective to execute long-horizon workflows such as root-cause analysis, PPA-aware RTL closure and analog layout generation.
- Multiphysics-Aware Models: Predict timing, PPA, DRC, DFT and analog physical design to enable multi-objective co-optimization at generation time.
- Design-Driven Model Navigator: Dynamically routes work across AI models based on the task, balancing quality of results, time to results and cost. Renoir, ChipAgents’ semiconductor-specific model, serves as a core domain model within this layer.
ChipAgents new IC-star execution engine is an LLM trained to provide mutli-physics design automation for both analog and digital chps. CHIPAGENTS
“Autonomous semiconductor engineering is a systems problem,” said William Wang, Founder and CEO of ChipAgents. “It is not enough to make an individual model stronger or add more agents to a workflow. The AI needs to understand the organization’s design knowledge, coordinate the right models and tools, evaluate real engineering results and account for the physical consequences of each decision. We built ChipAgents around that entire system so engineers can focus on the design objective while AI handles more of the execution underneath.”
ChipAgents has over 200 designs in process across its customer base, who are realizing significant benefits. CHIPAGENTS
The expanded platform builds on more than 200 semiconductor enterprise deployments across a growing range of design and verification workflows. “We are adopting ChipAgents to accelerate our chip and IP design and verification workflows,” said Simon Blake-Wilson, Senior Vice President and General Manager of Silicon IP at Rambus. “By combining Rambus’ deep semiconductor and silicon IP expertise with ChipAgents’ IC-star engine, we see an opportunity to help our customers bring advanced chips to market faster and achieve better design outcomes within their preferred design environments.”
Other early-access customers realized significant gains in design efficiency. Andes Technology reduced one processor-verification workflow from some three months to approximately three weeks and shortened a processor customization project by 30%. eMemory reduced engineering effort for datasheet analysis and verification-testbench construction by approximately 80%,while increasing test patterns by 18% and functional coverage by 5%. WhaleChip reduced semiconductor root-cause analysis from days to approximately 15–60 minutes per round while identifying four critical bugs.
Are We There Yet?
Have we reached fully autonomous chip design? No, chip design still requires a design team with full knowledge of the problem to be solved, the unique approach to solve it, and expertise honed by years of design experiences. But an AI that is rooted in physics and design experience can help the design team’s junior engineers perform at a higher level, and hopefully allow the senior engineers focus on the magic that leads to competitive advantage.
ChipAgents will provide a deeper technical look at the IC-star engine and its application across digital and analog engineering during an Oct. 29 webinar. For more information on the Oct. 29 webinar, check out this website.
Disclosures: This article expresses the author’s opinions and should not be taken as advice to purchase from or invest in the companies mentioned. Cambrian-AI Research is fortunate to have had many, if not most, semiconductor firms as our clients, including Blaize, BrainChip, Cadence Design, Cerebras, D-Matrix, Eliyan, Esperanto, Flex, GML, Groq, IBM, Intel, Micron, NVIDIA, Qualcomm Technologies, Si-Five, SiMa.ai, Synopsys, Ventana Microsystems, Tenstorrent and scores of investment clients. We have no investment positions in any of the companies mentioned in this article except Nvidia, where we are long.