The EDA leader has generated over $500M to date in AI tools and technologies. Now a new data analytics solution applies data management, curation, and analysis across the entire pipeline of chip creation.
Synopsys was the first EDA company to apply AI to chip design, with the DSO.ai solution for optimizing chip layout three years ago. DSO.ai has now helped over 270 customer projects optimize chip design using reinforcement learning to reduce development time, improve performance and power and lower product costs.
Not satisfied with just applying AI to the design aspect, the company then extended the application of AI across the customer workflow with Synopsys.ai, which adds optimizations of testing, verification, debug, and manufacturing.
Now the company is launching a solution to integrate the silos of data in the design, test, validation, and manufacturing processes and enable cross-domain analysis to further speed the chip design workflow.
The Synopsys EDA Data Analytics Solution
The new platform literally takes AI in chip design to the next level, providing analytics that can connect a problem revealed at test phase, for example, to a root-cause issue in architecture or manufacturing. The new solution can:
- Highlight comprehensive AI-driven data analytics solution to aggregate and utilize data across IC design, test, and manufacturing flow to drive more intelligent decision making.
- Speed design closure and minimizes project risk through intelligence-guided debugging and optimization.
- Improve fab yield for faster ramp and more efficient high-volume manufacturing (HVM).
- Uncover silicon data outliers across the semiconductor supply chain to improve chip quality, yield and throughput.
The Synopsys EDA Data Analytics solution is the first of its kind in the semiconductor industry to provide AI- driven insight and optimization to drive improvements across exploration, design, manufacturing, and testing processes. The solution combines the latest advances in AI to curate and operationalize magnitudes of heterogenous, multi-domain data to accelerate root-cause analysis and achieve greater design productivity, manufacturing efficiency, and test quality.
The AI-driven Synopsys EDA Data Analytics (.da) solution includes:
- Synopsys Design.da to perform deep analysis of data from Synopsys.ai design execution,
- Providing chip designers with comprehensive visibility and actionable design insights to
- Uncover new power, performance, and area (PPA) opportunities.
- Increases operational efficiencies and maximize product quality and fab yield.
“As IC complexity grows and market windows shrink, the semiconductor industry is increasingly adopting artificial intelligence technologies to enhance the quality of results (QoR), speed verification and testing, improve fab yield, and boost productivity across multiple domains spanning the entire IC design flow,” said Sanjay Bali, vice president of Strategy and Product Management for the EDA Group at Synopsys. “With the new data analytics capabilities within the Synopsys.ai EDA suite, companies can now aggregate and leverage data across every layer of the EDA stack from architecture exploration, design, test, and manufacturing to drive improvements in PPA, yield, and engineering productivity.”
Unlocking the Possibility Within Vast Volumes of Data
EDA, testing, and IC fabrication tools generate vast amounts of heterogeneous design data such as timing paths, power profiles, die pass/fail reports, process control, or verification coverage metrics. By extending the Synopsys.ai with the capability to analyze this data is critical for improving productivity, PPA, and parametric/manufacturing yield. Providing multi-domain data aggregation and curation through AI-driven flows and methodologies can deliver significant productivity gains with improved QoR. Now, IC suppliers can rapidly localize and correct problem areas throughout mask, fabrication, and test processes before they impact product quality and yield. Companies can also benefit from generative AI methods to enable new use cases like knowledge assistants, preemptive and prescriptive what-if exploration, and guided issue resolution.
Synopsys has demonstrated it knows how to apply AI to optimize specific tasks in the chip design workflow over the last 3 years. Now it is applying AI to a new level of analytics across the silos of that workflow, helping connect cause and effect from one step to a later step in the validation/test/manufacturing processes. And designers can uncover aspects in the design that are limiting the potential in reduced power, performance, costs. As this tool becomes more common place, Synopsys will reinforce its leadership in the practice of AI in chip design, saving hundreds of millions of dollars and helping their clients speed product to market.